Our invention relates to drive circuits for LCD displays, and more particularly to a circuit for driving the signal lines of a multi-level gray-scale LCD display.
As an example of an LCD display, FIG. 8 shows a schematic of an active-matrix thin-film transistor (TFT) color LCD display. A TFT liquid-crystal panel 100 has multiple gate lines Y1, Y2, . . . and multiple signal lines X1, X2, . . . which cross to form a matrix, and at each intersection point there is a thin film transistor for controlling a colored pixel (pixel) at that point. Gate line drivers G1, G2, . . . Gn are connected in parallel for driving the gate lines, and signal line (source) drivers S1, S2, . . . Sm are connected in parallel for driving the signal lines. A controller 102 controls the operation of each part. An image signal processing circuit 104 executes the necessary signal processing for the signals for the image to be displayed. A gray-scale voltage generating circuit 106 generates multiple-gray-scale voltages for enabling a full-color (multiple-gray-scale display).
Image signal processing circuit 104 supplies digital image data DX representing the gray-scale display of each pixel to the m signal line drivers. For example, with 64 gray-scale values, image data DL of 6 bits is provided to them signal line drivers from image signal processing circuit 104 for each red, green and blue (R,G,B) pixel. Controller 102 supplies various control or timing signals in synch with a horizontal synchronizing pulse HS and a vertical synchronizing pulse VS to the n gate line drivers and m signal line drivers. Gray-scale voltage generating circuit 104 provides multiple-level gray scale voltages corresponding to the 64 gray scale values achievable with the panel 100""s V-T (voltage-transmissivity) characteristics.
The detailed construction of a typical liquid-crystal panel 100 is shown in FIG. 9. A liquid crystal material 114 is sealed or filled between lower and upper glass plates 110 and 112. On the inner surface of plate 110, a pixel electrode Pi,j and a corresponding thin-film transistor TFTi,j composed of a transparent conductive film are formed near each intersection of a signal line Xj (not shown) and gate line Yi (not shown). Pixel electrode Pi,j is connected to corresponding signal line Xj via transistor TFTi,j, and the gate electrode Tg which controls transistor TFTi,j is connected to corresponding gate line Yi.
The inner surface of the other plate 112 is covered with a color filter layer 115 having a pattern of red, green, and blue (RGB) filters for corresponding colored pixels, over which is a common opposing electrode 116 formed of a transparent conductive film. On the outside surfaces of glass plates 110 and 112, corresponding lower and upper polarizer layers 118 and 120 are provided whose respective polarization axes can be made either parallel or orthogonal to each other.
As shown in FIG. 9, a light source for backlighting is provided beneath lower polarizer 118 and the backlit display can be viewed from above through upper polarizer 120. Suppose the polarization axes of polarizer layers 118 and 120 are parallel to each other (e.g., both pointed into the page in FIG. 9). Assume that unactivated liquid crystal (no electric field applied) rotates the polarization axis of the backlight entering through polarizer layer 118 by 90xc2x0 so it points to the left in FIG. 9 but activated liquid crystal (voltage applied between electrodes Pi,j and 116) does not rotate the backlight. In such case, the backlight (colored by filter 115) will only shine through polarizer layer 120 at those pixels where a voltage is applied between electrodes Pi,j and 116. If instead polarizer layers 118 and 120 are orthogonal to each other, the backlight will only shine through at those pixels where no voltage is applied.
In FIG. 9, Ts represents the transistor""s source electrode, Td its drain electrode, 124 a semiconductor layer, 126 a protective film, 128 a gate-insulating film, and 130 a black matrix separating the various RGB filters.
The circuit configuration within liquid-crystal panel 100 is shown in FIG. 10. The liquid crystal material 114 sandwiched between each pixel electrode Pi,j and facing common electrode 116 forms a signal storage capacitor Cs. During each frame, the gate lines Y1, Y2, . . . are usually selected and driven active one line at a time in scan line order by the gate line drivers.
For example, if gate line Yi for line i is driven active, all transistors TFTi,1, TFTi,2, . . . of line i connected to gate line Yi are turned ON. Simultaneously, signal line drivers S1, S2, . . . output the analog gray-scale voltages for all the pixels of the i line, and these gray-scale voltages activate corresponding pixel electrodes Pi1, Pi2, . . . via signal lines X1, X2, . . . and xe2x80x9cONxe2x80x9d transistors TFTi,1, TFTi,2, . . . .
Thereafter, gate line Yi is deactivated and gate line Yi+1 activated for the next line i+1, and the operation described above is executed for line i+1. When gate line Yi is deactivated, the transistors in line i turn OFF and the charge stored in each pixel of line i cannot escape its signal storage capacitor Cs, so the gray scale voltage level for each pixel electrode Pi1, Pi2, . . . is stored until the next time gate line Yi is selected.
Thus, a corresponding gray-scale voltage can be applied to each pixel electrode in one frame period, but to prevent degradation of the liquid-crystal molecules the polarity of the voltage applied must be alternated. In a TFT-LCD, there are two ways to apply alternating voltage to the liquid crystal material: the so-called common-fixed drive method and the common-inverting drive method.
As shown in FIG. 11, in the common-fixed drive method only the polarity of the voltage applied to the pixels alternates while the voltage applied to the common electrode 116 remains fixed. As shown in FIG. 12, in the common-inverting drive method, the polarities of both the voltage applied to the pixels and the common voltage are simultaneously alternated. That is, a positive voltage is applied to the pixel electrodes when common 116 electrode is negative, after which a negative voltage is applied to the pixel electrodes when common electrode 116 is positive.
The common-inverting drive method has the advantage of enabling a low-voltage driver to be used since the voltage amplification of the pixel electrode can be halved compared to the common-fixed process. However, it has the disadvantages that power consumption is high, because the large-capacitance common electrode 116 is driven with alternating current, and the display quality is inferior. In contrast, the common-fixed drive method has superior display quality and lower power consumption, although a low-voltage driver cannot be used. The common-fixed drive method is considered particularly suitable for large-screen TFT-LCD.
A conventional signal line driver circuit S using the common-fixed drive method is shown in FIG. 13. The circuit configuration of the drive portion for one signal line or one channel in such a signal line driver S is shown in FIG. 14.
In the conventional signal line driver S, an enable input signal EIO having pointing information, for example a xe2x80x9c1xe2x80x9d, is input from controller 102 into a shift register 140. This EIO signal is shifted within shift register 140 in accordance with a clock signal to sequentially designate the data storage positions for each channel portion of data register 142, enabling one line of image data DX from image data signal processing circuit 104 to be serially input into data register 142. Next, controller 102 provides a strobe signal ST to a data latch circuit 144 to input the one line of image data DX in parallel from data register 142 to the data latch circuit 144.
Then the image data DX in data latch 144 is input to a voltage level shifter circuit 145, which adjusts the signal voltage level, for example from 5 volts to 10 volts. The voltage-level adjusted one line of image data is then input from level shifter 145 to a digital-to-analog (D/A) converter supplied with all the gray-scale voltages by gray-scale voltage generating circuit 106.
In the common-fixed drive method, in order to apply each of the desired gray-level voltages for both positive and negative terminals with respect to the common fixed voltage, the number of gray-level voltages employed is twice the number of gray-scale values. Therefore, for 64 gray-scale values, gray-scale voltage generating circuit 106 must generate 128 reference voltages: 64 positive gray-scale voltages V1-V64 as well as 64 negative gray-scale voltages V64xe2x80x2-V1xe2x80x2.
As shown in FIG. 14, in each channel a D/A converter 146j decodes the 6-bit (for 64 levels) image data for one pixel and then selects and outputs the corresponding positive or negative gray-scale voltage Vj corresponding to the indicated display gray scale level. Gray-scale voltage Vj output from D/A converter 146j is output to corresponding signal line Xj by an output amplifier 148j, which is normally composed of a voltage follower. Because the common-fixed drive method employes twice as many gray-scale voltages as gray-scale values, the circuit scale, particularly the D/A converter, is substantially enlarged. Because the D/A converter has a voltage range including both the positive and negative gray-scale voltages, it operates with twice the normal voltage system, making it impossible to keep the area of each transistor element from becoming large. Therefore, the circuit scale increases noticeably as a result of the number of transistor elements doubling. When the chip area of the signal line driver becomes large, in addition to the chip cost increasing, satisfying the required specifications for the package (principally a tape carrier package) becomes difficult.
Also, in the common-fixed drive method output amplifier 148j of each channel alternately operates between negative and positive voltage ranges. Consequently, the arithmetic amplifier of the voltage follower in output amplifier 148j must satisfy the linearity and offset characteristics in the source state, in which electric current is discharged from the output terminal, and the sink state, in which electric current is drawn to the output terminal, for all positive and negative gray-scale voltages, and very high precision is needed. This causes a great burden on manufacture and circuit design.
Therefore, an object of the present invention is to provide a signal line drive circuit for LCD displays that can alternate the voltage applied to the liquid crystal but has reduced chip size and circuit scale.
To achieve the objective, the first signal line drive circuit for LCD displays of our invention composed such that liquid crystals arranged in a matrix between a number of pixel electrodes and an opposing electrode are filled, each of the pixel electrodes is electrically connected to the corresponding signal line through the corresponding thin-film transistor, the control terminal of the thin-film transistor is electrically connected to the corresponding gate line, an opposing electrode voltage is applied to the opposing electrode, and gray-scale voltage, with a voltage level corresponding to the necessary display gray scale, is applied through the signal line and the thin-film transistor to each pixel electrode every time the gate line is driven, is provided with a first and, second D/A conversion means commonly connected to neighboring first and second signal lines of the LCD display and composed to respectively generate analog positive gray-scale voltages and negative gray-scale voltages in accordance with the opposing electrode voltage according to the digital gray-scale data representing the necessary display gray scale for an optional pixel electrode, and a switching means which alternately repeats, at a prescribed cycle, a first operation, in which the first digital/analog (D/A) conversion means generates the positive gray-scale voltage corresponding to the gray-scale data of the first signal line at the same time the second digital/analog conversion means generates negative gray-scale voltage corresponding to the gray-scale data of the second signal line, and a second operation, in which the first digital/analog conversion means generates the positive gray-scale voltage corresponding to the gray-scale data of the second signal line at the same time the second digital/analog conversion means generates the negative gray-scale voltage corresponding to the gray-scale data of the first signal line.
The second signal line drive circuit of our invention was composed so that, in the first signal line drive circuit, the switching means alternately repeats the first and second operations in the line cycle at which the gate line is driven by a sequential operation, and makes the pixel electrode alternately repeat the first and second operations in the frame cycle at which the gray-scale voltage is applied.
The third signal line drive circuit of our invention was composed so that, in the first or second signal line drive circuit, the output terminal of the first digital/analog conversion means is connected to the first and second signal lines via the switching means and a first output amplifier, which has an impedance converting function, and the output terminal of the second digital/analog conversion means is connected to the first and second signal lines via the switching means and a second output amplifier, which has an impedance converting function.
The fourth signal line drive circuit for LCD displays of our invention composed such that the liquid crystals arranged in a matrix between a number of pixel electrodes and an opposing electrode are filled, each of the pixel electrodes is electrically connected to the corresponding signal line through the corresponding thin-film transistor, the control terminal of the thin-film transistor is electrically connected to each corresponding gate line, an opposing electrode voltage is applied to the opposing electrode, and a gray-scale voltage, with a voltage level corresponding to the necessary display gray scale, is applied through the signal line and the thin-film transistor to each pixel electrode every time the gate line is driven, is provided with a first gray-scale voltage generating means, which has a positive polarity with respect to the opposing electrode voltage and generates a number of positive gray-scale voltages with voltage levels corresponding to each of all set display gray scales; a second gray-scale voltage generating means, which has a negative polarity with respect to the opposing electrode voltage and generates a number of negative gray-scale voltages with voltage levels corresponding to each of all set display gray scales; a gray-scale voltage selecting means, which is connected to the respective output terminals of the first and second gray-scale voltage generating means and alternately repeats, at a prescribed cycle, a first selection operation, which selects and outputs a number of positive gray-scale voltages from the first gray-scale voltage generating means, and a second selection operation, which selects and outputs a number of negative gray-scale voltages from the second gray-scale voltage generating means; and a digital/analog conversion means, which is provided with respect to each of the signal lines, decodes the digital gray-scale data representing the necessary display gray scale for one input pixel, selects one of the gray-scale voltages corresponding to the gray-scale data from the number of positive gray-scale voltages or the number of negative gray-scale voltages provided by the gray-scale voltage selecting means, and outputs it through the signal line.
In the first to third signal line drive circuits of our invention, alternating-current driving between the neighboring channels is carried out by making the first digital/analog conversion means dedicated to positive gray-scale voltages and the second digital/analog conversion means dedicated to negative gray-scale voltages in the drive part of two neighboring signal lines or channels and by alternately executing the first and second operations at a prescribed cycle using a switching means.
In the fourth signal line drive circuit of our invention, the digital/analog conversion means for each channel does not require that both positive and negative gray-scale voltages generated by the gray-scale voltage generating means be received simultaneously, so the necessary decoding operation can be carried out by inputting a gray-scale voltage of only one polarity corresponding to that of the alternating-current drive from the gray-scale voltage selecting means.